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SM9503A Radio Controlled Clock Receiver IC
OVERVIEW
The SM9503A is a BiCMOS IC RCC*1 receiver IC. It accepts low frequency standard wave input received from an external antenna, amplifies it, detects the data signal, and outputs a digital time code signal. Radio controlled clock
FEATURES
I I I I
PINOUT
(Top view)
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NC
1
I
I
I
I
I
I
Operating supply voltage range: 1.2 to 3.6V Operating current consumption: 36A (typ) @1.5V Standby current consumption: 0.1A (max) @1.5V High sensitivity: 0.3Vrms (typ) input @60kHz input Low frequency standard wave range: 35kHz to 80kHz AGC gain hold function External crystal filter connection Some versions by a compensation capacitor to cancel the crystal parallel capacitor BiCMOS process Package:16-pin VSOP, Chip form
ORDERING INFORMATION
Device
Package
SM9503AV CF9503A
16-pin VSOP Chip form
PACKAGE DIMENSIONS
(Unit: mm)
4.4 0.2
6.4 0.2
0.275TYP 5.1 0.2
0.10
+ 0.1 0.22 - 0.05
0.12 M
NIPPON PRECISION CIRCUITS INC.--1
0.10 0.05
0.65
1.15 0.1
0 to 10
0.5 0.2
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16
*1:
IN2 VDD PON OUT VSS HLDN CP CB
IN1 NC
VSSA XO1
XO2
XI
LF
8
9
+ 0. 0.15 - 1 0.05
SM9503A
PAD LAYOUT (CF9503A)
(Unit: m)
IN2 (1430,2360)
IN1 NC VSSA
XO1 XO2 XI (0,0)
PAD NAME and DIMENSIONS (CF9503A)
Pad number 1 2 3 4 5 6 7 8 9 Pad name XI
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LF CB CP HLDN VSS OUT PON VDD VDDA IN2 NC IN1 NC VSSA XO1 XO2 10 11 12 13 14 15 16 17
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13 14 15 9 8 VDD PON OUT VSS 7 6
DA9503 NPC
NC
12
11
10
VDDA
16 17 1
5 4 3
HLDN CP CB
2
LF
Chip size: 1.43 x 2.36mm Chip thickness: 300 30m PAD size: 100m x 100m Chip base: VSS
Pad dimensions [m] X 170 447.5 1230 1230 1230 1230 1230 1230 1230 1259.4 908.4 170 170 170 170 170 170 Y 280.6 220 274.2 543.2 823.4 1042 1266.2 1535.2 1759.4 2110 2110 2055.8 1786.8 1506.6 1276 829.8 560.8
NIPPON PRECISION CIRCUITS INC.--2
SM9503A
BLOCK DIAGRAM
PON
OUT
VSS
HLDN CP
CB
LF
VDD VDDA Bias
AGC Control
IN1 AGC Amp IN2
VSSA
XO1
PIN DESCRIPTION
Pad number 1 2 3 4 5 6 Pin number 7 8 9
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Name XI I/O1 I A/D2 A LF O O A A CB CP O A HLDN VSS Ipu - D A OUT O D D A A A x A x A A A PON VDD Ipu - VDDA IN2 NC - I 1 x I 2 3 IN1 NC x - 4 VSSA XO1 XO2 5 6 O O
10 11 12
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7 8 9 13 14 15 - 10 11 12 16 13 14 15 16 17 1. I: input, O: output, Ipu: input with pull-up resistor, -: supply pin 2. A: analog signal, D: digital signal
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Decoder Peak/Bottom Hold Det. LPF
CC
Post Amp
Rectifier
XO2
XI
Description
Crystal filter input connection
Rectifier LPF capacitor connection Bottom-hold detector capacitor connection
Peak-hold detector capacitor connection
AGC gain hold control (active LOW) (-) Negative supply input (substrate potential)
Time code output (active LOW) Standby-mode control input (active LOW) (+) Positive supply input (+) Positive supply input (AGC amplifier) Antenna input 2 No connection (must be open) Antenna input 1 No connection (must be open) (-) Negative supply input (AGC amplifier) Crystal filter output 1 Crystal filter output 2
NIPPON PRECISION CIRCUITS INC.--3
SM9503A
SPECIFICATIONS
Absolute Maximum Ratings
VSS = 0V
Parameter Supply voltage range Input voltage range Power dissipation Storage temperature range Symbol VDD VIN PD Tstg Condition Rating -0.3 to 7.0 -0.3 to VDD + 0.3 150 Unit V V
16-pin VSOP 16-pin VSOP Chip form
Recommended Operating Conditions
VSS = 0V
Parameter Supply voltage range Operating temperature range Symbol VDD Topr
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-55 to 125 -65 to 150 Condition Rating 1.2 to 3.6 -20 to 70
mW C C
Unit V
C
SM9503A
Electrical Characteristics
VDD = 1.2 to 3.6V, VSS = 0V, Ta = -20 to 70C unless otherwise noted.
Rating Parameter Operating supply voltage Maximum operating current consumption1 Normal operating current consumption1 Standby mode current consumption Minimum input voltage range Maximum input voltage range Input frequency Startup time2 Startup time Input voltage (PON)2 Symbol VDD IDDM VDD = 1.5V, Ta = 25C, no input signal, PON: VSS, OUT: Open Condition min 1.2 - typ - 50 max 3.6 80 V A Unit
IDDT
VDD = 1.5V, Ta = 25C, 0.1mVrms input amplitude (differential input), 500ms pulsewidth, PON: VSS, OUT: Open PON, HLDN: VDD or Open
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- 36 - - - 0.1 - 0.3 - 1.0 - 80 35 - - 80 8 - - - 8 - - 0.2 - VDD - 0.2 -1 - - - - - 1 - - 0.2 - - 160 200 300 650 TBD TBD 9 VDD - 0.2 1 - - 100 400 TBD TBD - - - - - 200 500 800 900 -
f [kHz] 60 L1 [kH] TBD C1 [fF] TBD R1 [k] TBD C0 [pF] TBD
A
IST VFMIN VFMAX FIN tON tPON VIL VIH
A
IN1-IN2 differential input, FIN = 60kHz
Vrms
IN1-IN2 differential input, FIN = 60kHz IN1-IN2 differential input When supply is applied From standby mode PON, HLDN
mVrms kHz sec sec V V A A V V sec ms ms ms ms ms ms dB
PON, HLDN
Input current
IIL IIH
VIN = 0V, PON, HLDN
VIN = VDD, PON, HLDN IOL = 5A, OUT
Gain hold time
Fall time output propagation delay3
Rise time output propagation delay3 LOW-level output pulsewidth4 (200ms) LOW-level output pulsewidth4 (500ms) LOW-level output pulsewidth4 (800ms) LOW-level output pulsewidth4 (900ms) Noise rejection ratio5
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S/N
L1 C1 R1 C0
1. Measured using the standard circuit. 2. The time taken under stable wave input conditions from when power is applied or standby is released, using PON, until stable digital output occurs within ratings. 3. The time taken, with 10:1 input signal amplitude ratio and 500ms pulsewidth, from when a change in signal input occurs until the output OUT changes. Note that this characteristic is very dependent on the antenna and crystal filter characteristics. The standard crystal used here has the following equivalent circuit coefficients.
4. Values obtained when using the NPC standard crystal employed here. Note that these values are dependent on the crystal characteristics, and should be considered as reference values. 5. Time averaged rms values, where the noise is white noise and the measurement bandwidth is determined by the crystal filter equivalent used in the standard circuit.
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VOH IOH = - 5A, OUT 3dB variation tHLD tDN tUP T200 T500 T800 T900
Output voltage
VOL
FIN = 60kHz, NPC standard crystal, NPC standard jig
NIPPON PRECISION CIRCUITS INC.--5
SM9503A
STANDARD CIRCUIT
+ -
100k 60kHz
TYPICAL APPLICATION CIRCUIT
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ANT NC IN1 NC VSSA XO1 XO2 XI LF
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100k 60kHz
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NC IN2 IN1 NC VDDA VDD VSSA XO1 XO2 XI PON OUT VSS HLDN LF CP CB 0.22F 1F 1F 0.1F IN2 VDDA VDD CONTROLLER PON OUT VSS HLDN CP CB 1F 1F 0.1F 0.22F
50
NIPPON PRECISION CIRCUITS INC.--6
SM9503A
FUNCTIONAL DESCRIPTION
AGC Amplifier and Gain Hold Function
The input voltage from the antenna is amplified by the AGC amplifier. The gain can be monitored by the voltage on pin CP, and can be changed by varying the CP voltage. An external capacitor Cp can be connected to CP to stabilize the voltage, but the gain tracking time is dependent on the capacitance. When HLDN is open (or HIGH), the gain automatically adjusts to follow the post-amplifier detector signal. When HLDN is LOW, the immediately preceding gain is held for an interval determined by the Cp capacitance.
Crystal Filter Circuit
External crystals are used as filters. The center frequency and bandwidth of the filters is determined by the crystal characteristics. If the center frequency is lower than the target frequency, it is necessary to add CL capacitor for the adjustment frequency. If Q of the crystal filter is higher and the output delay is larger, it is necessary to add RL to adjust it. Adding a compensation capacitor CC, it is possible to select built-in or external, cancels the high-frequency components pass through the crystal parallel capacitance. Compensation capacitors are built in, and wiring them inside makes possible to select versions of the required capacitances from 0.5pF to 2.0pF.
CC
AGC Amp
Post Amp
XO1
XO2
XI
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CC CL RL
The case of using the external compensation capacitor
Detector Circuit
The amplified signal is full-wave rectified and passed through a lowpass filter detector. The detector output is input to peak hold (pin CP) and bottom hold (pin CB) circuits to form the decoder reference potentials and peak hold potential for AGC control.
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VDD potential
Amplifier Rectifier LPF
VDD potential
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CC
AGC Amp Post Amp XO1 XO2 XI
CL
RL
The case of using built-in compensation capacitor
VDD potential
Bottom hold Peak/ Bottom Hold Peak hold
NIPPON PRECISION CIRCUITS INC.--7
SM9503A
Decoder Circuit
The detector output and peak/bottom hold mid-level potential reference are used to decode the time code signal, which is output on pin OUT. The output is active-LOW, so that the output is LOW when the input amplitude is HIGH.
VDD potential
Rectifier LPF
LPF waveform
VDD potential
Bottom hold Peak/ Bottom Hold
Mid-level potential Peak hold
Standby Function
When PON is open (or HIGH), the device is in standby mode and the current consumption is reduced. Receiver operation starts when PON goes LOW.
PON Open (or HIGH) LOW Mode Standby OUT
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Operating Time code
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VDD potential
Decoder
OUT output
VSS potential
HIGH
SM9503A
Please pay your attention to the following points at time of using the products shown in this document. The products shown in this document (hereinafter "Products") are not intended to be used for the apparatus that exerts harmful influence on human lives due to the defects, failure or malfunction of the Products. Customers are requested to obtain prior written agreement for such use from NIPPON PRECISION CIRCUITS INC. (hereinafter "NPC"). Customers shall be solely responsible for, and indemnify and hold NPC free and harmless from, any and all claims, damages, losses, expenses or lawsuits, due to such use without such agreement. NPC reserves the right to change the specifications of the Products in order to improve the characteristic or reliability thereof. NPC makes no claim or warranty that the contents described in this document dose not infringe any intellectual property right or other similar right owned by third parties. Therefore, NPC shall not be responsible for such problems, even if the use is in accordance with the descriptions provided in this document. Any descriptions including applications, circuits, and the parameters of the Products in this document are for reference to use the Products, and shall not be guaranteed free from defect, inapplicability to the design for the mass-production products without further testing or modification. Customers are requested not to export or re-export, directly or indirectly, the Products to any country or any entity not in compliance with or in violation of the national export administration laws, treaties, orders and regulations. Customers are requested appropriately take steps to obtain required permissions or approvals from appropriate government agencies. NIPPON PRECISION CIRCUITS INC. 4-3, Fukuzumi 2-chome, Koto-ku, Tokyo 135-8430, Japan Telephone: +81-3-3642-6661 Facsimile: +81-3-3642-6698 http://www.npc.co.jp/ Email: sales@npc.co.jp
NP0410BE 2004.11
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NIPPON PRECISION CIRCUITS INC.--9
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